In pipelined analog-to-digital converters (ADCs), the major sources of error include gain insufficiency, gain nonlinearity and capacitor mismatches. When digital background calibration of pipelined ADCs is performed, typically the first step is to extract, in background, quantitative information about the error sources or the errors themselves. The second step is to use the extracted information to correct the errors.
While the second step in the digital background calibration of pipelined ADCs, namely correcting the errors using the information extracted in background, is generally simple and straightforward, a lot of research effort is spent on developing new, improved ways of executing the first step, namely extracting quantitative information about the error sources and/or errors.